The present invention relates generally to computer memory calibration, and more particularly to computer memory calibration using flash and memory protection mechanisms.
Microprocessor-based computer systems are well known and widely available. Generally, the core of a microprocessor system is a single integrated circuit (IC) chip, which contains a processor. Typically, after conducting a bootstrap initialization process, the processor reads, decodes and executes a stream of instructions, which form a program or process. Usually, the process is stored in random access memory (RAM) or read only memory (ROM), which is external to the processor chip.
RAM is the most common type of memory found in computers and other related devices. RAM is volatile, meaning RAM contents are lost when power is turned off. RAM is generally synonymous with main memory or the memory available to programs. For example, a computer with an 8M RAM has approximately eight million bytes of memory that programs can use. In contrast, ROM refers to special memory used to store programs that boot the computer and perform diagnostics. Once data has been written onto a ROM chip, it generally cannot be modified, but can only be read. Most personal computers have a small amount of ROM (a few thousand bytes). Both types of memory (ROM and RAM) allow random access.
Electrically erasable programmable read-only memory (EEPROM) is a type of ROM that is erasable (one byte at a time) by exposure to electrical charge. As with other types of ROM, EEPROM retains its contents when power is turned off and is not as fast as RAM.
Flash memory is a special type of EEPROM that is erased and reprogrammed in blocks. Many modem Personal computers (PCs) have Basic Input/Output Systems (BIOS) stored on flash memory chips to simplify system updates. Standard flash memory often contains separate blocks, which can be programmed individually. However, if one block is being erased, none of the blocks can be accessed until the erase procedure is complete. Segmented flash are available which contain two or more blocks or segments which can be accessed even when another segment is being reprogrammed.
Emulation is the ability of a program or device to imitate another program or device. Emulation tricks the software into believing that a device is really a different device. Emulators add value to corresponding computer systems by facilitating testing of computer components on printed circuit boards (e.g., baseboards or computer cards), and by facilitating modification of software in ROM based systems without requiring ROM re-program for every software modification.
By breaking the connection between a target memory and the local processor, an emulator can allow either the target memory to provide the necessary data or the emulator to provide data instructions and addresses for the local processor to execute. Emulator overlay memory allows the emulator to provide data to the processor, regardless of the actual data included in the target memory.
Currently, calibration development has been conducted through hardware devices. An example of an existing technique is the external system-to-control-unit ROM emulation device. This design requires controllers with robust test connectors that give access to the micro-controller bus. A test connector, however, requires a large area of control unit substrate and an emulation device, both of which are costly.
An alternate calibration technique is an internal-to-control-unit full calibration emulator. This technique requires a controller having an additional emulation RAM, which is relatively expensive and which substantially burdens control unit substrate and microprocessor chip selection resources.
Another current calibration technique is the use of internal microprocessor overlay RAM (also referred to as tuning RAM or CALRAM). This technique requires additional RAM with supporting logic to overlay a flash area, but this may add cost to the production configuration and is limited by the size of RAM available.
Other implementations of calibration development are possible by modifying the algorithm software itself. This invention allows a de-coupling of the algorithm from the calibration data access implementation.
The disadvantages associated with current computer memory calibration techniques have made it apparent that a new technique to regulate computer memory calibration using only resources available in production (i.e. flash memory and memory protection mechanism) is needed. The new technique should facilitate calibration over a serial, parallel or debug port and should also minimize the quantity of required hardware components and thereby substantially minimize system costs. The present invention is directed to these ends.
The present invention provides a method for computer memory calibration. The present invention also provides a system for implementing the computer memory calibration method.
In accordance with the present invention, a method for computer memory calibration, which includes the step of flashing a calibration into a first flash memory section and a second flash memory section, is disclosed. A central processing unit (CPU) requests data stored in the first flash memory section. Exception handler logic within a memory protection mechanism activates and generates an exception for the data stored in the first flash memory section. The calibration in the second flash memory section is then transferred to the CPU as a function of the exception.
One advantage of the present invention is that it reduces costs associated with part count. Additional advantages and features of the present invention will become apparent from the description that follows and may be realized by the instrumentalities and combinations particularly pointed out in the appended claims, taken in conjunction with the accompanying drawings.